发明名称 TRANSMISSION DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a transmission device capable of supporting both M-section DCC and R-section DCC bytes. SOLUTION: This transmitting device, having a plurality of interface parts and a packet processing packet data, is provided with a plurality of receiving clock generating parts for extracting a receiving clock from a synchronous frame, an intra-device clock generating part generating an intra-device clock, a receiving memory, a plurality of data separating parts which synchronize with the receiving clock and separate 1st data mapped to a prescribed position in an overhead from the synchronous frame, a 1st data receiving part, which synchronizes with the receiving clock and writes the 1st in the receiving memory, a 1st data transmitting part which synchronizes with the intra-device clock, reads the 1st data from the receiving memory and transmits the 1st data to the packet processing part, and a packet receiving part, which synchronizes with the intra-device clock and receives the 1st data transmitted from the 1st data transmitting part.</p>
申请公布号 JP2001186177(A) 申请公布日期 2001.07.06
申请号 JP19990364365 申请日期 1999.12.22
申请人 FUJITSU LTD 发明人 ONODERA TAKASHI;MINAMIGUCHI HIDENORI
分类号 H04J3/00;H04L12/42;H04L12/951;(IPC1-7):H04L12/56 主分类号 H04J3/00
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