发明名称 MULTILAYER CAPACITOR, WIRING SUBSTRATE, DECOUPLING CIRCUIT AND HIGH FREQUENCY CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a multilayer capacitor whose equivalent series inductance(ESL) is reduced. SOLUTION: A plurality of lead electrodes 22, 23 are formed to lead to side surfaces 14 to 17 of a capacitor body 18 from each of internal electrodes 20, 21. The ratio L/W of the lengthwise direction dimension L and the widthwise direction dimension W of each of these lead electrodes 22, 23 is set in the range of 0.4 to 3.0 preferably in the range of 0.4 to 1.3.
申请公布号 JP2001185441(A) 申请公布日期 2001.07.06
申请号 JP19990370803 申请日期 1999.12.27
申请人 MURATA MFG CO LTD 发明人 NAITO YASUYUKI;KURODA TAKAKAZU;HORI HARUO;KONDO TAKANORI;YANO NORITAKA;MURATA MITSUHIRO
分类号 H01G4/12;H01G2/06;H01G4/30;H01G4/40;(IPC1-7):H01G4/30 主分类号 H01G4/12
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