发明名称 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING IT
摘要 PROBLEM TO BE SOLVED: To suppress the occurrence of junction leaks by suppressing the over etching of an element isolating insulating film and an impurity diffusion layer in the large-aspect ratio contact structure of an LSI device in which DRAM cells and logic are mixedly loaded. SOLUTION: In the LSI device, a first etching stopper layer 121 is formed to cover a peripheral MOS transistor and a second etching stopper layer 122 is formed above the capacitor sections of DRAM memory cells. The impurity diffusion layers 113 of the MOS transistor are connected to a metallic wiring layer formed above the capacitor sections through an electrode layer 131 formed through the etching stopper layers 121 and 122 and at least one of the layers 113 is formed in such a way that the layer 113 connects the electrode layer 131 to the boundary of the element isolating insulating film 102 and the depth of the layer 113 from the surface of the diffusion layer 113 in the bottom section of the electrode layer 131 formed on the insulating film 102 is made shallower than the joining depth of the diffusion layer 113.
申请公布号 JP2001185703(A) 申请公布日期 2001.07.06
申请号 JP20000275912 申请日期 2000.09.12
申请人 FUJITSU LTD;SONY CORP 发明人 NUNOFUJI WATARU;YOSHIHARA IKUO
分类号 H01L21/768;H01L21/8242;H01L23/485;H01L27/04;H01L27/108 主分类号 H01L21/768
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