| 摘要 |
PURPOSE: A method for making a layout of column transistors is provided to reduce the number of contacts, and increase width of a transistor so that high integration of a device can be easy and operation characteristics of the device can be improved. CONSTITUTION: Four column transistors as a group share active regions(20). The active regions(20) of two groups of column transistors(CT1-CT4),(CT5-CT8) are shared by source and drain regions of column transistors in an adjacent sense amplifier. Gate electrodes(22) are arranged on the active regions(20). Bit lines(Bitj, BitBj, BitBi, BitBi)(24) are overlapped on the active regions(20), and are formed in a row direction. Local data lines(26) are formed in a column direction so that they can be orthogonal to the bit lines(24). A metal line(28) is formed over space between the active regions(20) to a direction parallel with the bit lines(24).
|
