发明名称 METHOD FOR GENERATING FREQUENCY OF DUAL PHASE LOCKED LOOP
摘要 PURPOSE: A method for generating a frequency of a dual phase locked loop is provided so that a phase error and phase noise can be decreased by reducing an oscillation band width of a voltage control oscillator, by adjusting a radio frequency local oscillation frequency and an intermediate frequency local oscillation frequency. CONSTITUTION: A duplexer(101) separates and outputs a radio signal from an antenna. A low noise amplifier(103) receives the radio signal from the duplexer(101) and amplifies the radio signal. A reception radio frequency bandpass filter(105) filters the amplified signal. The first mixer(107) receives the radio signal and a radio frequency local oscillation frequency from a radio frequency local oscillation unit(142), and outputs an intermediate frequency signal. The first reception bandpass filter(109) filters the intermediate frequency. The intermediate frequency signal is amplified in the first reception amplifier(110), and outputted to the second mixer(111). The second mixer(111) receives the intermediate frequency signal and an intermediate frequency local oscillation from an intermediate frequency local oscillation unit(149), and outputs a baseband signal. The baseband signal is inputted to an in-phase/quadrature demodulator(117) through the second reception bandpass filter(113) and the second reception amplifier(115). The in-phase/quadrature demodulator(117) demodulates the baseband signal into in-phase data and quadrature data.
申请公布号 KR20010059868(A) 申请公布日期 2001.07.06
申请号 KR19990067405 申请日期 1999.12.30
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KOO, DO IL
分类号 H03D7/16;H03L7/07;H03L7/23;(IPC1-7):H04B7/15 主分类号 H03D7/16
代理机构 代理人
主权项
地址