| 摘要 |
PURPOSE: A pipeline data path controller using a mixed hard-wired method is provided to control a pipeline data path by using a micro coding method together with a hard wired method. CONSTITUTION: An instruction register(100) stores an instruction outputted from an instruction memory. An instruction storage unit(101) outputs encoded instruction data of n bits stored by the instruction stored in the instruction register(100). A control signal generation unit(102) is composed of the n number of FSM(Finite State Machine(102-1¯102-N)) in order to output a control signal to a control bus(104). A decoding unit(105) decodes a control signal of n bits provided from the control bus(104). The control signal decoding unit(105) is composed of an execution stage control unit(106) which decodes the control signal provided from the control bus(104) in an execution stage, a memory stage control unit(107) which decodes the control signal in a memory stage and a register recording stage control unit(108) which decodes the control signal in a register recording stage.
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