| 摘要 |
PURPOSE: A redundancy circuit of a DRAM having a fail bank is provided to realize a bit completely by assembling chips having a fail bank properly and converting the fail bank into a good bank coding, in order to increase a yield. CONSTITUTION: A fuse logic part(10-40) generates a bank selection signal(BS) to activate a coding of a fail bank inputted from the external by cutting a fuse of a good bank while amending the fail bank with the good bank. And a bank coding part(50-80) disables the fail bank by assembling the bank selection signal generated from the fuse logic part and a disable bank signal(DB) according to the state of a bank and activates the good bank. The fuse logic part comprises a fuse connected to a supply power terminal, an inverter(I) inverting a signal being output through the fuse, the first transmission gate(T1) supplying or blocking the bank selection signal by being turned on/off according to an output signal of the fuse, and the second transmission gate(T2) supplies or blocks the bank selection signal by being turned on/off according to an output signal of the inverter.
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