发明名称 MULTILAYER WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wiring board with which crack of a connecting conductor charged in a through hole can be effectively prevented and resistance of this connecting hole can be suppressed low. SOLUTION: Concerning a multilayer wiring board, a first wiring layer 2 and a second wiring layer 3 are successively laminated on the upper surface of a substrate 1 while interposing an insulation layer 4, and the first wiring layer 2 and the second wiring layer 3 are electrically connected by a connecting conductor 5 inside a through hole 5 provided on the insulation layer 4. A number of pores 7 having the diameter of 0.1 to 3.0μm are formed inside the connecting conductor 6 and the volume ratio (porosity) of these pores 7 in the connecting conductor 6 is set to 1.2 to 14.5%.
申请公布号 JP2001185855(A) 申请公布日期 2001.07.06
申请号 JP19990365114 申请日期 1999.12.22
申请人 KYOCERA CORP 发明人 TOMIYAMA AKITOSHI;NAKAMURA RYOJI
分类号 H05K1/11;C22C1/08;H05K3/46;(IPC1-7):H05K3/46 主分类号 H05K1/11
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