发明名称 SRAM CELL AND DRIVING METHOD THEREOF
摘要 PURPOSE: An SRAM cell and a driving method thereof are provided to decrease cell area, and to simplify a manufacture process by supplying a source through a bit line instead of a source supplying line. CONSTITUTION: An SRAM cell(20) includes access transistors(Q21,Q22), a pair of bit line(BIT2,/BIT2), high load resistors(R21,R22), and drive transistors(Q23,Q24). Gates of the access transistors(Q21,Q22) are connected to a word line(W/L2). The access transistor(Q21) is connected between the bit line(BIT2) and the first cell node(N2), and the access transistor(Q22) is connected between the bit line(/BIT2) and the second cell node(/N2). The high load resistor(R21) is connected between the bit line(BIT2) and the first cell node(N2), and the high load resistor(R22) is connected between the bit line(/BIT2) and the second cell node(N2). The drive transistor(Q23) is connected between the first node(N2) and the ground, and the drive transistor(Q24) is connected between the second node(/N2) and the ground. At this time, PMOS transistors(Q5,Q6) are connected to each of the BIT line(BIT) and the inverting BIT line(/BIT), and are for supplying a source voltage(Vcc) with the BIT line(BIT) and the inverting BIT line(/BIT). The SRAM cell(20) uses a direct connection of the pair of bit line(BIT2,/BIT2) and the high load resistors(R21,R22) in order to supply a source instead of a line for supplying the source voltage(Vcc).
申请公布号 KR20010058347(A) 申请公布日期 2001.07.05
申请号 KR19990062602 申请日期 1999.12.27
申请人 HYNIX SEMICONDUCTOR INC. 发明人 IN, SEONG UK;KWON, TAE U;SONG, YEONG PYO
分类号 G11C11/413;(IPC1-7):G11C11/413 主分类号 G11C11/413
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