发明名称 METHOD FOR FORMING METAL LINE USING DUAL DAMASCENE PROCESS
摘要 PURPOSE: A method for forming a metal line using a dual damascene process is provided to improve a signal transfer speed by inserting a low dielectric between interlayer dielectric layers. CONSTITUTION: A lower metal line layer(21) is formed on a semiconductor substrate(20). A lower insulating layer(22a) is formed thereon. A low dielectric insulating layer(23) is formed on the lower insulating layer(22a). The lower insulating layer(22a) is exposed by removing partially the low dielectric insulating layer(23). An upper insulating layer(24) is formed on the lower insulating layer(22a) and the low dielectric insulating layer(23). A part of the lower metal line layer(21) is exposed by forming a trench for upper line and a contact hole. A part of the low dielectric insulating layer(23) is exposed by forming a trench for forming a pad. An anti-diffusion metal layer(25a) and an upper metal line layer(26A) are formed on the structure. An upper metal line and a pad metal line are formed by using the anti-diffusion metal layer(25a) as an etching stop layer. The remaining anti-diffusion metal layer(25a) is removed. A capping layer(27) is formed to cover the upper metal line and the pad metal line.
申请公布号 KR20010058209(A) 申请公布日期 2001.07.05
申请号 KR19990061720 申请日期 1999.12.24
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, CHEOL MO;SHIN, WON HO
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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