发明名称 |
STRESS ISOLATED INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF |
摘要 |
A stress-isolated integrated circuit includes a semiconductor die (24) having first and second surfaces (28, 32) and a semi-circumferential trench (44) formed into the first surface of the die todefine a stress-isolated region (48). At least some of the active IC components are located in the stress-isolated region. A cavity (46) is formed into the second surface of the die, the cavity being sized so that the trench opens into the cavity to create a cantilevered stress-isolated region extending from the remainder of the die. The second surface of the die is secured to a lead frame (36), the lead frame having bond wires (42) secured to bond pads (26) on the die. A molding compound (54) encapsulates the die, the cap, the bond wires and a portion of the lead frame to create a molded IC device (20). The invention helps to improve performance characteristics and component variables of analog and mixed-signal integrated circuits by isolating critical portions of the integrated circuits from detrimental packaging and molding stresses. |
申请公布号 |
WO0148815(A1) |
申请公布日期 |
2001.07.05 |
申请号 |
WO2000US35592 |
申请日期 |
2000.12.27 |
申请人 |
MAXIM INTEGRATED PRODUCTS, INC. |
发明人 |
BURNS, DAVID, W.;BRYZEK, JANUSZ |
分类号 |
H01L21/764;H01L23/10;H01L23/16 |
主分类号 |
H01L21/764 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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