发明名称 PATTERN FOR MONITORING DEFECT IN METAL INTERCONNECTION PROCESS OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A pattern for monitoring a defect in a metal interconnection process is provided to minimize the area of the pattern for monitoring a short circuit of a metal interconnection and a bridge defect, by alternatively disposing interconnection lines having polygonal helical structures, by forming a common electrode connected to one end of the interconnection lines in each central portion, and by forming a monitoring electrode in the other end of the interconnection lines in the central portion. CONSTITUTION: The first interconnection line(11) is a line pattern having a helical structure. The second interconnection line(12) is a polygonal helical structure having a plurality of line patterns and alternating with the first interconnection line. A common electrode(P11) is connected to one end of the first and second interconnection lines in the central portion of the first and second interconnection lines. The first and second monitoring electrodes(P12,P13) are connected to the other end of the first and second interconnection lines in the outside of the first and second interconnection lines.
申请公布号 KR20010057676(A) 申请公布日期 2001.07.05
申请号 KR19990061049 申请日期 1999.12.23
申请人 ANAM SEMICONDUCTOR., LTD. 发明人 LEE, BYEONG CHEOL
分类号 H01L21/66;(IPC1-7):H01L21/66 主分类号 H01L21/66
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