| 摘要 |
A logarithmically controlled attenuator circuit includes a first group of parallel resistive elements (Q1, Q3, Q5...), each having a first terminal connected to an output connector (12), and a second group of parallel resistive elements (Q2, Q4...) each having a first terminal connected to the output connector (12). A first group of switching elements (30-1, 30-3, 30-5...) selectively couples the parallel resistive elements of the first group, respectively, between the output conductor (12) and a first reference voltage conductor (Vcm) and a second group of switching elements (30-2, 30-4...) selectively couples the parallel resistive elements of the second group, respectively, between the output conductor (12) and the first reference voltage. The gain of the logarithmically controlled attenuator is controlled by turning on selected combination of the switches of both the first and second groups. A programmable low noise, low distortion CMOS logarithmic attenuator/amplifier circuit is also disclosed.
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