发明名称 METHOD FOR FORMING METAL INTERCONNECTION LINE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a metal interconnection line of a semiconductor device is provided to permit an easy formation of the metal interconnection line in a contact hole with a high aspect ratio. CONSTITUTION: In the method, a barrier metal layer(11) is formed on a portion of a semiconductor substrate(10), and then the first interlayer dielectric layer(12) is formed thereon. Next, the second interlayer dielectric layer(13), which is different from the first interlayer dielectric layer(12) in etch rate, is formed on the first interlayer dielectric layer(12). Then, to expose a portion of the barrier metal layer(11), the second interlayer dielectric layer(13) is anisotropically etched and the first interlayer dielectric layer(12) is isotropically etched. Therefore, the contact hole(17) having different upper and lower sizes is formed therein. Next, the metal interconnection line(18) is formed on the exposed barrier metal layer(11), and then an insulating layer(19) is formed thereon to fill the contact hole(17). In addition, another contact hole(14) filled with a tungsten plug(15) may be formed by anisotropically etching the both interlayer dielectric layers(12,13).
申请公布号 KR20010056940(A) 申请公布日期 2001.07.04
申请号 KR19990058626 申请日期 1999.12.17
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, SEONG GWON
分类号 H01L21/28;(IPC1-7):H01L21/28 主分类号 H01L21/28
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