| 摘要 |
PURPOSE: A fabrication method of a CMOS transistor is provided to realize a simplified fabrication process with reduced cost without using a separate photolithography process for a gate electrode. CONSTITUTION: In the method, a gate oxide layer(106) and a polysilicon layer(108) are sequentially formed on an n-type semiconductor substrate(100) having a p-well(102) and a field oxide layer(104), and then selectively etched to form the gate electrode(108a) of an NMOS transistor. Next, n-type impurities with low concentration are implanted into the substrate(100) to form an n-LDD region(112) in the p-well(102) at both edges of the NMOS gate electrode(108a). Next, the gate oxide layer(106) and the polysilicon layer(108) are selectively etched again to form the gate electrode of a PMOS transistor, and then a p-LDD region is formed inside the substrate(100) in a similar manner to the n-LDD region(112). Particularly, each gate electrode(108a) is formed by using the identical resist pattern(110) to be used for forming the corresponding LDD region(112). Accordingly, the number of required photolithography processes and required masks is reduced.
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