摘要 |
PURPOSE: A low voltage charge pump circuit is provided to operate normally even in an analogue circuit having a low power source voltage having a DRAM and to obtain a high pumping gain and to output voltage. CONSTITUTION: The first stage MOS transistor(M1) is received an external voltage(VDD). Pumping clock pulses(VP11)(VP12) having different phases being created in an external oscillator are alternately applied through a pumping capacitors(C1¯C4) in second stage¯ fifth stage MOS transistors(M2¯M5). A pumping loss decreasing unit(10) is connected to a gate of the MOS transistors(M1¯M5) and decreases a pumping loss in accordance with a critical voltage of the MOS transistors(M1¯M5). An electric charge storing capacitor(Cf) is connected to an output terminal of the fifth MOS transistor(M5). The pumping loss decreasing units(10, 11, 12, 13, 14) comprise MOS transistors(M6¯M10) for applying initial voltage to a gate of the MOS transistors(M1¯M5) and pumping capacitors(CA¯CE) for decreasing a pumping loss in accordance with a critical voltage of the MOS transistors(M6¯M10).
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