| 摘要 |
PURPOSE: An apparatus for searching data/address on a double layer board is provided to watch the contents of address and data bus on a hardware basis to solve the problem due to the mismatch of the data and to search memory error of a standby mode. CONSTITUTION: The apparatus for searching data/address on the double layer board includes the first data latch(108,208), the first parity generator/searcher(105,109), the first parity memory(106,110), the second parity generator/searcher(205,209), the second parity memory(206,210), the first parity comparator(112), the first interrupt controller(113) and the first double layer controller. The first data latch stores the data from the first data buffer temporarily and outputs the data to a standby board. The first parity generator/searcher generates and searches for the parity bit which corresponds to the data stored on the first data buffer. The first parity memory stores the output of the first parity generator/searcher. The second parity generator/searcher generates and searches for the parity bit which corresponds to the data stored on the first data latch. The second parity memory stores the output of the second parity generator/searcher. The first parity comparator compares the logic values of the first and second parity generator/searchers. The first interrupt controller controls to generate the interrupt based on the output of the first parity comparator. The first double layer controller determines whether the cycle is a write cycle writing data from an active board to the standby board or a read cycle reading data from the standby board to control the first address latch as well as the first data latch.
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