Method and apparatus for implementing a variable length delay instruction

摘要

A method for implementing a variable length delay instruction includes the steps of designating a source register for holding information and designating a destination register for retrieving the information. A first number of cycles before retrieval of the information to the destination register then is determined, and the information is transferred from the source register to delaying device, such as queuing device, for the first number of cycles. Finally, the information is written from the delaying device to the destination register. An apparatus for implementing variable length delay instructions includes an input line Ä32Ü for reading information from a source register; delaying device for receiving said information read from the source register Ä33Ü; a multiplexer Ä36Ü; and a select line Ä35Ü. A trigger signal is transmitted to the multiplexer Ä36Ü, thereby instructing the multiplexer to write the information to a destination register Ä33Ü. <IMAGE>