发明名称 |
Method of forming a gate structure of a transistor by means of scalable spacer technology |
摘要 |
A method is described which can be used to form gate structures of very small dimensions in a semiconductor device. The method may be used to avoid employment of highly-sophisticated and cost-intensive DUV photolithography. In one illustrative embodiment, the method comprises forming a gate electrode layer, forming a first mask layer above the gate electrode layer, and forming a sidewall spacer adjacent the sidewalls of the first mask layer. Thereafter, the method comprises forming a second mask layer above a portion of the sidewall spacer and the first mask layer, removing portions of the sidewall spacer to define a hard mask comprised of a portion of the sidewall spacer, and patterning the gate electrode layer using the hard mask to define a gate electrode of the device.
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申请公布号 |
US6255182(B1) |
申请公布日期 |
2001.07.03 |
申请号 |
US20000503634 |
申请日期 |
2000.02.14 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
WIECZOREK KARSTEN;HORSTMANN MANFRED;HAUSE FREDERICK N. |
分类号 |
H01L21/28;H01L21/336;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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