发明名称 PLATING METHOD AND PLATED STRUCTURE
摘要 PROBLEM TO BE SOLVED: To provide a highly productive plating method capable of superiorly filling a part to be plated, such as connection hole and wiring groove of a semiconductor device, and a plated structure. SOLUTION: After a barrier layer 5 and a catalytic layer 30 are formed on the plane including a connection hole 7 formed on a wafer 41, the catalytic layer 30 excluding that on the connection hole 7 is removed by scrubbing, by which the catalyst layer 30 on the connection hole 7 is left selectively. By performing copper electroplating in this state, a copper plating film 8A can be formed on the connection hole 1 alone. The copper plating film 8A can be embedded in this state as a copper wiring 8 by electroless plating or can be embedded as a copper wiring 8 by electroplating using the copper plating film 8 as a seed layer.
申请公布号 JP2001181851(A) 申请公布日期 2001.07.03
申请号 JP20000298639 申请日期 2000.09.29
申请人 SONY CORP 发明人 SATO SHUZO;YUBI HIROSHI;SEGAWA YUJI
分类号 C23C18/16;C23C18/18;C25D5/34;C25D7/12;H01L21/288;H01L21/3205;H01L21/768;H01L23/52;(IPC1-7):C23C18/16 主分类号 C23C18/16
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