Integrated memory having memory cells disposed at crossover points of word lines and bit lines

摘要

An integrated memory has first control lines, which run in the direction of bit lines, and a second control line, which runs in the direction of word lines. First control inputs of in each case at least two switching elements that are connected to different sense amplifiers are connected to the same first control line. The second control inputs of the switching elements are connected to the second control line. The invention makes it possible to reduce the number of first control lines running in the direction of the bit lines.