发明名称 Trench DRAM cells with self-aligned field plate
摘要 The capacitor includes trenches formed in a semiconductor substrate. Recess portions are formed adjacent to the top portion of the openings of the trenches. An isolation layer is formed on the substrate and on the surface of the recess portions. A first isolation structure is formed on the substrate between the trenches. Second isolation structures are refilled into the recess portions, and the second isolation structures are raised over the isolation layer. A dielectric layer is formed in the trenches along the surface of the trenches. A first storage node is refilled into the trenches. A portion of the first storage node is formed over the first isolation structure to act as a field plate of the capacitor. A third isolation structure is formed on the field plate. The third isolation structure is formed of silicon oxide. A second storage node is formed in the substrate along the surface of the trenches.
申请公布号 US6255682(B1) 申请公布日期 2001.07.03
申请号 US19980122813 申请日期 1998.07.27
申请人 ACER INC. 发明人 WU SHYE-LIN
分类号 H01L21/8242;(IPC1-7):H04L27/108 主分类号 H01L21/8242
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