发明名称 METHOD FOR FORMING SHALLOW TRENCH ISOLATION REGION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming a shallow trench isolation region of a semiconductor device is provided to minimize generation of parasitic current due to a sharp edge of an upper portion of the isolation region. CONSTITUTION: In the method, a pad oxide layer(12) and a nitride layer(13) are sequentially formed on a semiconductor substrate(11). A photoresist pattern is then formed thereon to expose a portion of the nitride layer(13), and the nitride layer(13) is etched through the photoresist pattern. After the photoresist pattern is removed, impurity ions are implanted into the substrate(11) through an exposed portion of the pad oxide layer(12) and then diffused uniformly to form an impurity layer(14). Here the impurity layer(14) has a greater depth than the shallow trench isolation region(15) to be formed. After that, the exposed portion of the pad oxide layer(12) is etched and subsequently an exposed portion of the substrate(11) is etched to a definite depth to form the shallow trench isolation region(15). The isolation region(15) is therefore surrounded with the impurity layer(14), and thereby generation of parasitic current is prevented. Next, a surface of the substrate(11) is oxidized to form an oxide layer(16), and the trench isolation region(15) is filled with an insulating layer.
申请公布号 KR20010053679(A) 申请公布日期 2001.07.02
申请号 KR19990054144 申请日期 1999.12.01
申请人 HYNIX SEMICONDUCTOR INC. 发明人 SO, SEONG IL
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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