| 摘要 |
PURPOSE: A comparison circuit of a semiconductor memory device is provided to reduce an occupation area in a chip with a simple circuit configuration. CONSTITUTION: The first and the second control input part(10,20) comprises inverters(I2,I3) and two inverters(22,23,24) respectively, and set the first and the second node(NO1,NO2) as a fixed level initially in response to a control signal for mode entrance. And, a pull-up and a pull-down input part(30,40) comprises a plurality of transistors(32-36),(42-46) respectively, and receive data provided from memory cells of the device as input signals, and output a state signal indicating whether all of the logic levels of the input signals are equal to the first and the second node respectively. A comparison gating part(50) comprises an inverter(52) and a NOR gate(53), and compares the logic levels on the first and the second node whose levels are converted according to the state signal. And, an output transmission part(60) comprises a pass gate(62) and an inverter(63), and is enabled in response to the control signal, and outputs a test result signal(CHKb) indicating whether the memory cell is defective or not by receiving a gating output of the comparison gating part.
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