| 摘要 |
PROBLEM TO BE SOLVED: To reduce the interruption of a processing by a processing caused by a processing for guaranteeing memory access order. SOLUTION: This data transfer device 1 sends a request to 16 memory devices 201 to 216 interleaved constitution through a multistage crossbar network 4 in the data transfer device 1. A command generation part decomposes one vector transfer instruction into instructions different in address and sends them to an address generation part 3, and decides here whether some of the decomposed requests have access to the same memory address. When so, a SYNC instruction is inserted into the decomposed instructions to be sent out to the address generation part 3. The address generation part 3 checks the steady of each crossbar when the command generation part 2 issues the SYNC instruction, confirms that none of requests which were issued before is left on a crossbar without waiting for a reply from a memory, and sends the request following the SYNC instruction out to the crossbar.
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