发明名称 WIRING BOARD, SEMICONDUCTOR DEVICE HAVING WIRING BOARD AND MANUFACTURING METHOD THEREOF AND PACKAGING METHOD
摘要 PROBLEM TO BE SOLVED: To achieve a significant reduction in the cost of a wiring board, a narrowing of the pitch between the wirings in the board and the enhancement of the yield of the manufacture of the board. SOLUTION: During the manufacturing process of a multilayer wiring board which is formed of a multilayer wiring layer 3, the wiring board is dynamically restrained by a substrate formed of a metal plate 16, the flatness of each layer in the board during the manufacture is high held after the flatness of the plate 16 and the generation of a warpage in the layer structure of the board is suppressed. It is more desirable that the base layer of the layer structure has buffer properties. The layer 3 having little distortion can be made thin in its thickness. As the result, the pitch between the wirings in the board can be made short. Moreover as the result, the production cost of the board can be reduced. The standoff height of the board is increased on the base layer, which is formed of a plurality of metal layers 11 and a plurality of stress absorption layers 12, and moreover, the board has a buffer effect.
申请公布号 JP2001177010(A) 申请公布日期 2001.06.29
申请号 JP20000057767 申请日期 2000.03.02
申请人 NEC CORP 发明人 HONDA KOICHI
分类号 H01L23/12;H01L21/48;H01L21/60;H01L21/68;H01L23/00;H01L23/31;H01L23/498;H05K3/20;H05K3/46 主分类号 H01L23/12
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