| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory having low redundancy scheme improving redundancy efficiency. SOLUTION: This device is characterized in that the device is comprised of normal memory cell array blocks 21a1, (21b1), redundant memory cell array block 21a2, (21b2), and the device is provided with plural sub-memory cell array blocks 21a-21b selected by responding to activation of a correspondent block selecting signal and a means in which one part of a defective word line of a normal memory cell array block included in any of a sub-memory cell array blocks is replaced by a redundant word line of a redundant memory cell array block included in any one of a sub-memory cell array block, and residue of a defective word line is replaced by a redundant word line of a redundant memory cell array block included in the other sub-memory cell array block.
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