| 摘要 |
PROBLEM TO BE SOLVED: To realize GF interleave that can enhance error correction capability for an error correction code. SOLUTION: A counter control section 101 outputs a read address while incrementing a row number and a column number of a two-dimensional array with respect to a block interleave represented by the two-dimensional array, a bit inverter 102 receives the read address and inverts the bits of the read address, a column converter 103 provides an output of an address value corresponding to the bit inverted output value and the column number from the counter control section 101 as a column conversion value, a shift register 104 shifts bits of the output value of the bit inverter 102, and provides an output as an address offset value, an adder 105 sums the address offset value and the column conversion value, and a magnitude correlation comparison section 106 compares the sum with an interleave size and outputs data in the interleave size as an address value.
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