发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To facilitate the loop control of wires at the time of wire bonding, to prevent wire short-circuit and to improve yield. SOLUTION: A multilayer wiring board where a power electrode 2d and a ground electrode 2f are alternately arranged in the innermost column among bonding electrodes installed around a cavity part 2a in three columns, and plural signal electrodes 2e are arranged on the outermost column; the wires 3 connecting the pad 1a of a semiconductor chip and the bonding electrode of the multilayer wiring board, and forming the height of the wire loop for the bonding electrode in the outermost column to be higher that the wire loop for the bonding electrode in the innermost column; and plural bump electrode installed in the multilayer wiring board; are installed. Then, the power electrode 2d and the ground electrode 2f are arranged in one column in the innermost column. Thus, the two types of the loop heights of the wires 3 are installed. The control of the wire loop at the time of wire bonding can be facilitated.
申请公布号 JP2001176911(A) 申请公布日期 2001.06.29
申请号 JP19990363498 申请日期 1999.12.21
申请人 HITACHI LTD;HITACHI HOKKAI SEMICONDUCTOR LTD 发明人 NAKAMARU TSUTOMU
分类号 H01L21/60 主分类号 H01L21/60
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