| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory and its test method in which a temperature characteristic at the time of read-out of a bit line can be sufficiently guaranteed, over-erasion bits can be detected efficiently, and an over- erasion state for the bits can be stably prevented efficiently and in the best state. SOLUTION: At the time of product test of a memory cell array consisting of non-volatile memory cell transistors MC1, MC2, an erasion state is detected efficiently and stably at room temperature by fixing award line WL1 of the non-volatile memory cell transistor MC1 to a negative potential, or making it the same potential as the memory cell transistor MC2 selecting the word line WL1 of the memory cell transistor MC1. |
