发明名称 DIAGNOSIS CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a technique for reducing the overhead of test time. SOLUTION: This circuit is provided with a compactor chain 22 separately from a scan chain 21, and this compact chain compresses and takes in the data outputted from the first logical circuit 11 independent of the data of the above scan chain. As a result, the data breakage with the scan chain in compressing and taking in the data outputted from the first logical circuit is eliminated, and the update of all data of the scan chain in every test is made needless, whereby the shortening of the test time is achieved.
申请公布号 JP2001177064(A) 申请公布日期 2001.06.29
申请号 JP19990358622 申请日期 1999.12.17
申请人 HITACHI LTD 发明人 IKETANI TOYOHITO
分类号 G01R31/28;H01L21/822;H01L27/04;(IPC1-7):H01L27/04 主分类号 G01R31/28
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