发明名称 METHOD AND SYSTEM FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method and a system for manufacturing a semiconductor device in which the characteristics and reliability of a semiconductor device are prevented from lowering along with the yield of fabrication thereof by preventing the occurrence of side etching of an interconnection layer due to shading effect of electron to formation of the interconnection layer using high density plasma etching. SOLUTION: After upper layer interconnection layers 40a, 40b are formed in a plasma etching chamber 12, by removing a polysilicon layer 40 through high density plasma etching, until the surface of an underlying interlayer insulation film 36 is exposed, the entire surface of a semiconductor substrate is irradiated with UV-rays UV having energy of 2.4-5.5 eV in a UV-ray curing chamber 12. Consequently, a state where the upper layer interconnection layer 40a which is not connected with a lower layer interconnection layer 34 is charged positive is eliminated, and the upper layer interconnection layer 40a which is not connected with a lower layer interconnection layer 34 has the same potential as the upper layer interconnection layer 40a connected with the lower layer interconnection layer 34. Subsequently, overetching is performed again in the plasma etching chamber 12.
申请公布号 JP2001176860(A) 申请公布日期 2001.06.29
申请号 JP19990361337 申请日期 1999.12.20
申请人 SONY CORP 发明人 NODA YASUTOSHI
分类号 H01L21/302;H01L21/3065;H01L21/3213;(IPC1-7):H01L21/306 主分类号 H01L21/302
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