发明名称 |
Power semiconductor device |
摘要 |
In a semiconductor device having a first terminal 101 (source terminal) and a second terminal 102 (drain terminal), the substrate main surface of a semiconductor chip is on the (110) face, the main contact face of an n-type region 2 and a p-type region 4 is the {111} face perpendicular to the (110) face, elongated n-type regions 2 and elongated p-type regions 4 which are arranged alternately and adjacently form a voltage holding area, said first terminal 101 is connected to said p-type regions through wiring, and said second terminal 102 is connected to said n-type regions 2. Also, said p-type region is formed to cover the bottom corners of a gate polycrystalline silicon layer 8.
|
申请公布号 |
US2001005031(A1) |
申请公布日期 |
2001.06.28 |
申请号 |
US20000733098 |
申请日期 |
2000.12.11 |
申请人 |
SAKAMOTO KOZO;INOUE YOSUKE;MIYAUCHI AKIHIRO;SHIRAISHI MASAKI;MORI MUTSUHIRO;WATANABE ATSUO;OHYANAGI TAKASUMI |
发明人 |
SAKAMOTO KOZO;INOUE YOSUKE;MIYAUCHI AKIHIRO;SHIRAISHI MASAKI;MORI MUTSUHIRO;WATANABE ATSUO;OHYANAGI TAKASUMI |
分类号 |
H01L21/336;H01L29/04;H01L29/06;H01L29/08;H01L29/10;H01L29/12;H01L29/423;H01L29/732;H01L29/739;H01L29/772;H01L29/78;H01L29/872;(IPC1-7):H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L21/336 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|