| 摘要 |
The invention concerns a HEMT type semiconductor device comprising: a semiconductor substrate (31); a buffer semiconductor layer (32) formed on said substrate; a first semiconductor well layer (33) formed on said buffer layer and serving as a first conductivity type channel layer; a second semiconductor well layer (34) formed on said first well layer and serving as a second conductivity type opposite said first conductivity, channel layer; and a potential barrier layer (35) formed on said second well layer and forming a potential barrier for carriers; a gate electrode (36) formed on said potential barrier layer; a pair of ohmic electrodes (39, 40) formed on said potential barrier layer and located on both sides of said gate electrode; p-type regions (37a to 37f) extending from said potential barrier layer to said buffer layer under said ohmic electrodes, respectively; and n-type regions (38a to 38f) extending from said potential barrier layer to said buffer layer under said ohmic electrodes, respectively, said p-type regions and n-type regions being adjacent to each other along the longitudinal direction of said ohmic electrodes (39, 40). <IMAGE> <IMAGE> |
