Power-supply voltage fluctuation inhibiting circuit

摘要

Disclosed are a circuit and method for inhibiting a fluctuation in power-supply terminal voltage of a CPU caused by a change in working current of the CPU, which is connected to a DC power supply. The circuit includes a CPU controlled between a sleep state and an operating state by the value of a stop-clock signal applied thereto from a stop-clock terminal; a transistor inserted in parallel with the CPU across power-supply terminals thereof; and a control circuit for controlling the flow of current into the transistor in dependence upon a change in the power-supply current of the CPU caused by a change in the stop-clock signal, thereby inhibiting a fluctuation in voltage across the power-supply terminals of the CPU.