| 摘要 |
PURPOSE: To provide a data transfer controller and an electronic device that warrant a stable operation even on the occurrence of a reset operation to clear topolygical information of a node. CONSTITUTION: The data transfer controller in compliance with the IEEE 1394 standards cancels execution of a start (resume) command when a CPU (firmware) issues a start (resume) command for data transfer during a bus reset period and informs the CPU about cancelation of the command through interruption. The command is cancelled by masking a signal that is active at the issue of the command with a signal that is active for the bus reset period. When the CPU issues a pause command, transfer processing is paused at a predetermined pause point. The hardware automatically disassembles transfer data into a series of packets, which are consecutively transferred. When the CPU simultaneously issues a resume command and a pause command for the data transfer, the transfer processing is paused after transfer processing is executed stepwise.
|
