发明名称 CLOCK DRIVER
摘要 <p>PROBLEM TO BE SOLVED: To solve such a problem that operation from the start of clock input up to the adjustment of driving capacity is slow in a conventional clock driver because the frequency of a clock signal is measured by a counter and compared with numerical data stored in a memory. SOLUTION: The clock driver is provided with a frequency division ratio discrimination means 4 for discriminating the frequency division ratio of a clock signal to be inputted and outputting a digital signal corresponding to the frequency division ratio, plural three-state buffers 3a to 3c connected with each other in parallel and a driving buffer 2 connected to the three-state buffers 3a to 3c in parallel and capable of inputting, driving and outputting a clock signal and constituted so as to adjust the driving capacity in accordance with the frequency division ratio of the clock signal.</p>
申请公布号 JP2001166845(A) 申请公布日期 2001.06.22
申请号 JP19990353618 申请日期 1999.12.13
申请人 MITSUBISHI ELECTRIC CORP 发明人 KIRITANI MASAHIDE
分类号 G06F1/04;H03K19/0175;(IPC1-7):G06F1/04 主分类号 G06F1/04
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