发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To enable to form a fine wiring groove and a connecting hole, by highly accurately machining a wiring groove and a connecting hole of dual damascene structure without machining at the connecting hole with a high aspect ratio and at the position having a high step difference. SOLUTION: A silicon oxide first interlayer insulating film 12, an etching stop layer 13, a silicon oxide second interlayer insulating film 14, and a mask layer 15 are formed in this order. Thereafter, a wiring groove pattern 16 is opened in the mask layer 15, and a via-hole pattern 17 is opened in the second interlayer insulating film 14 and the etching stopper 13 so as to at least extend to the wiring groove 16. A wiring layer 18 is formed in the second interlayer insulating film 14 by means of the mask layer 15 as a mask and, at the same time, a via-hole 19 is formed on the first interlayer insulating film 12 by means of the etching stop layer 13 as an etching mask.
申请公布号 JP2001168188(A) 申请公布日期 2001.06.22
申请号 JP19990345754 申请日期 1999.12.06
申请人 SONY CORP 发明人 MIYATA KOJI
分类号 H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/768
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