发明名称 MEMORY CONTROL UNIT AND METHOD FOR CONTROLLING CACHE MEMORY
摘要 PROBLEM TO BE SOLVED: To improve the processing performance of a memory control unit with a write cache. SOLUTION: This memory control unit 200 is provided with a non-volatile cache 2400 interposed between plural disk devices 3000 and a host computer 1000 for temporarily holding read data/write data transferred between them. The binary management of the management information of user data on the cache 2400 is operated in an in-cache management information area 2420 in the cache 2400 and an in-local memory management information area 2221 in a volatile local memory 2210 capable of high speed access, and reference to the management information in a normal time is executed from the high speed in-local memory management information area 2221, and the management information is restored from the non-volatile in-cache management information area 2420 to the in-local memory management information area 2221 when any failure is generated. Thus, it is possible to quicken the access processing to the cache 2400 without deteriorating reliability.
申请公布号 JP2001166993(A) 申请公布日期 2001.06.22
申请号 JP19990353595 申请日期 1999.12.13
申请人 HITACHI LTD 发明人 TANAKA RIE;ISHIKAWA ATSUSHI
分类号 G06F12/08;G06F3/06;G06F11/14;G06F11/20 主分类号 G06F12/08
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