发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To avoid making algorithm complex in normal write-in operation and write-in operation before erasion. SOLUTION: This device is constituted so that a test bit is generated using a test bit generation matrix in which the number of elements of '1' of each row are the number of pieces required for generating a test bit and an odd number, in normal write-in operation and write-in operation before erasion.</p>
申请公布号 JP2001167596(A) 申请公布日期 2001.06.22
申请号 JP19990350655 申请日期 1999.12.09
申请人 TOSHIBA CORP 发明人 KASAI HISAMICHI;NISHIMURA NOZOMI
分类号 G11C16/06;G11C16/16;G11C29/00;G11C29/42 主分类号 G11C16/06
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