发明名称 LAYOUT DESIGNING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a layout designing method which can perform the best pin division while taking electromigration into consideration, divide output pins of a high-drive cell suitably, prevent deterioration in wiring performance to generate no surplus wiring, and reduce total wiring, and shorten a TAT. SOLUTION: This method is actualized by setting a 1st procedure for sectioning a circuit formed of plural elements into plural cells each consisting of at least one element, a 2nd procedure (11 to 15) for judging whether or not the sum of temporary wiring capacity between mutually connected cells and the input pin capacity of the connected cells is larger than the driving capacity of a driving-side cell connected to the cell, and a procedure (16 to 18) for calculating the center of a group when it is judged by the 2nd procedure that the sum is not larger and dividing the group by the straight line connecting the output pin of the cell having the largest driving capacity among cells and the calculated center of the group.
申请公布号 JP2001167143(A) 申请公布日期 2001.06.22
申请号 JP19990352431 申请日期 1999.12.10
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 KOBAYASHI TAKAKURA
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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