| 摘要 |
PROBLEM TO BE SOLVED: To read stable data out of a memory just after reset cancel. SOLUTION: A circuit 30 generates a memory initializing timing signal 8 and a memory initializing select signal 9 from a reset signal 30 and a clock signal 7. A circuit 29 generates a memory initializing data signal 10, a memory initializing address signal 11 and a memory initializing write enable signal 12 from the signal 8 and the signal 7. The memory initializing data signal 10 selects data to be read out of a side-0 memory 26 and a side-1 memory 27 just after reset or cancel. A circuit 21, a circuit 22 (24) and a circuit 23 (25) are provided for switching signals 1 to 5 at the time of ordinary operation and signals 10 to 12 at the time of initialization corresponding to the signal 9 and writing these signals on the side-0 memory 26 and the side-1 memory 27. A circuit 28 selects the read data of the side-0 memory 26 and the side-1 memory 27 corresponding to the signal 6. A circuit 50 checks data by comparing the signal 10 with the signals 18 and 19.
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