发明名称 RING BUFFER CONTROL METHOD
摘要 PROBLEM TO BE SOLVED: To reduce the processing load of a microprocessor by simplifying the memory address designation of a ring buffer. SOLUTION: An index I=1 to n is set for each processing block 1 to n of a ring buffer, and addresses A1 to An of each block are set for each index I=1 to n, and an index I=n+1 is set after the index I=n, and the address A1 of the first block and index data '1' indicating the fist index are set in the index I=n+1. An index counter C is incremented, and each block is accessed in a forward direction based on each address by referring to the index I in the forward direction, and the first block is accessed based on the address A1 by referring to the index I=n+1 after referring to the index I=n, and the index counter is returned to '1' based on the basis of the index data.
申请公布号 JP2001166916(A) 申请公布日期 2001.06.22
申请号 JP19990346211 申请日期 1999.12.06
申请人 VICTOR CO OF JAPAN LTD 发明人 NISHIYAMA NAOKI
分类号 G06F12/02;G06F5/06;(IPC1-7):G06F5/06 主分类号 G06F12/02
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