| 摘要 |
PURPOSE: A data input/output system having data strobe clock is provided to reduce a data strobe clock line number and shorten data transfer time. CONSTITUTION: A plurality of modules(100a,100b,,,,100n) comprise a plurality of semiconductor memory devices, respectively. A clock driver(105) generates data strobe clock signals to be supplied to the modules via clock lines(N105a, N105b,,,, N105n), in order to control data transfer time of the modules. A data strobe line(DS) is connected to the modules(100a,100b,,,,100n).
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