Address sequencer for synchronous flash memory device, has toggle logic cells with either NAND or NOR gates, for generating toggle logic signals corresponding to even and odd address signals

摘要

Even and odd toggle logic cells generate even and odd toggle address signals corresponding to the signals output by even and odd address signal generators, respectively. Each toggle logic cell has either NAND or NOR gate, for generating corresponding toggle logic signal. Output of gate in each logic cell is connected to input of gate in another toggle logic cell. Independent claims are also included for the following: (a) Even/odd address signal generation method; (b) Synchronous flash memory