| 摘要 |
Inputs to an IC are maintained in phase by a semiconductor device comprising a clock-generating circuit 131 for generating an internal clock on the basis of an external clock applied from an external source, a signal input circuit 144 for receiving an input signal applied thereto in synchronism with the external clock and retrieving this input signal into the semiconductor device in synchronism with the internal clock generated by the clock generating circuit and a dummy input circuit 145 supplied with a signal in synchronism with the input signal having the same frequency as the external clock, for judging an output signal value at the time of retrieving the input signal in synchronism with the internal clock generated by the clock generating circuit, to judge whether the timing of retrieving the input signal of the signal input circuit is advanced or delayed with respect to the internal clock. The clock-generating circuit includes a delay circuit 134 for selectively delaying the external clock and generating the internal clock on the basis of the result of the judgement at the dummy input circuit, and a delay control circuit 135 for controlling the delay amount of the delay circuit on the basis of the result of the judgement at the dummy input circuit. |
