发明名称 Process for secured data transfer
摘要 <p>The secure data transfer operates in a programmable circuit containing a controller (UC), ROM and RAM, connected by a data bus (DBUS). N octets of secret data are transferred over the data bus, and the octets are sent in a different order each time the data transfer is made, using a transfer rule that has a parameter chosen at random before each transfer, using a random number generator (GA).</p>
申请公布号 EP1109103(A1) 申请公布日期 2001.06.20
申请号 EP20000470020 申请日期 2000.12.06
申请人 STMICROELECTRONICS S.A. 发明人 TEGLIA, YANNICK
分类号 G06F12/14;G06F1/00;G06F7/58;G06F13/38;G06F21/55;G06F21/62;H04L9/10;(IPC1-7):G06F12/14 主分类号 G06F12/14
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