| 摘要 |
A solid state imaging device has: a first polysilicon layer 901; a second polysilicon layer 902; a photoelectric converting portion or PD 903; a read gate 904; a read channel 905 (in this case, an N-layer) which is formed in a semiconductor below the read gate; a P-layer 906 which prevents a signal charge from erroneously entering a VCCD of a unit pixel adjacent in a horizontal direction; a P-layer 907 which defines the transfer channel region of a VCCD; and a VCCD 908 which transfers a signal charge in the direction of the arrows. A unit pixel 900 is indicated by a one-dot chain line. The two-dimensionally arrayed solid state imaging device is driven by driving pulses of eight phases in total, namely, a driving pulse phiV1 911, a driving pulse phiV2 912, a driving pulse phiV3 913, a driving pulse phiV4 914, a driving pulse phiV5 915, a driving pulse phiV6 916, a driving pulse phiV7 917, and a driving pulse phiV8 918.
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