发明名称 |
Semiconductor memory device with switching element for isolating bit lines during testing |
摘要 |
A semiconductor recording device includes two transistors connected to two bit lines, respectively, that are turned OFF by a retention test signal during a retention test. One of the bit lines is put into high impedance with the help of a write driver, and "0" is output to the other bit line. Therefore, charge at H-level is not supplied to the bit lines during the retention test, so that a memory cell having a faulty connection will not temporarily retain H-level data.
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申请公布号 |
US6249468(B1) |
申请公布日期 |
2001.06.19 |
申请号 |
US19990412504 |
申请日期 |
1999.10.05 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
KAN YASUHIRO;ISOI NORITSUGU;TAMURA HIROAKI |
分类号 |
G11C11/413;G11C7/12;G11C29/12;H01L21/66;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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