| 摘要 |
The present invention relates to an inverter for outputting high voltage in use of CMOS transistors of low voltage, more particularly, to a circuit generating a high voltage output without subsidiary shield voltage. The present invention, wherein an inverter circuit generates high voltage in use of low voltage transistors, includes a first PMOS of which gate is supplied with a high input signal and of which source is connected to a power supply terminal, a second PMOS of which source is connected to a drain of the first PMOS and of which drain is connected to an output terminal, a first NMOS of which gate is connected to a low input signal and of which source is connected to a ground terminal, a second NMOS of which source is connected to a drain of the first NMOS and of which drain is connected to the output terminal, a third PMOS of which gate and source is connected to a high input signal and of which drain is connected to a gate of the second PMOS, and a third NMOS of which gate and source are connected to a low input signal and of which drain is connected to a gate of the second NMOS and the drain of the third PMOS.
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